7473 IC – Dual Master-Slave J-K Flip-Flops with Clear
🔲 7473 IC – Dual Master-Slave J-K Flip-Flops with Clear
The 7473 is a Dual J-K Master-Slave Flip-Flop IC with clear functionality, widely used in digital electronics for designing counters, memory elements, and sequential logic circuits. It includes two independent flip-flops with J, K, clock (CLK), and clear (CLR) inputs, and Q/Q̅ outputs. It is packaged in a standard DIP-14 form and operates on TTL logic levels.
⚙️ Technical Specifications
| Parameter | Specification |
|---|---|
| Logic Family | TTL (74 series) |
| Flip-Flop Type | Master-Slave J-K |
| Number of Flip-Flops | 2 |
| Package Type | DIP-14 |
| Supply Voltage (Vcc) | 4.75V to 5.25V (Typically 5V) |
| Input Logic Levels | HIGH ≥ 2V, LOW ≤ 0.8V |
| Output Drive Current | ~8 mA |
| Asynchronous Clear | YES (active LOW) |
| Clock Trigger Type | Negative-edge triggered |
| Operating Temperature | 0°C to +70°C (standard TTL range) |
📌 Pin Configuration (DIP-14)
| Pin | Function | Pin | Function |
|---|---|---|---|
| 1 | CLR1 (Clear 1) | 14 | Vcc (Power) |
| 2 | CLK1 (Clock 1) | 13 | CLR2 (Clear 2) |
| 3 | K1 | 12 | CLK2 (Clock 2) |
| 4 | J1 | 11 | K2 |
| 5 | Q1 | 10 | J2 |
| 6 | Q̅1 | 9 | Q2 |
| 7 | GND | 8 | Q̅2 |
🧠 Logic Function – J-K Flip-Flop
| J | K | CLK ↓ | Q (Next) |
|---|---|---|---|
| 0 | 0 | Falling | No Change |
| 0 | 1 | Falling | 0 |
| 1 | 0 | Falling | 1 |
| 1 | 1 | Falling | Toggle |
🧽 Clear (CLR) forces Q = 0 and Q̅ = 1, regardless of clock or inputs (when active LOW).
🛠️ Applications
Frequency dividers
Counters (binary, ripple, synchronous)
Shift registers
Sequential logic circuits
Digital memory storage
Educational and lab experiments